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Coreboot native VGA support. - LIBV Intentionally Breaks Videodrivers [entries|archive|friends|userinfo]
Luc Verhaegen

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Coreboot native VGA support. [Jul. 23rd, 2009|02:51 pm]
Luc Verhaegen
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[Current Location |couch]
[mood |accomplished]
[music |dEUS - Vantage Point 06 - Architect]

I didn't exactly intend to time this in the middle of Novell's Hackweek, as my personal hackweek pretty much started the day after FOSDEM. But oh well, it finally did happen and it happened just now. And it was much overdue, since it was mostly written in the months before i even joined SuSE. And when i was at SUSE it got pushed aside while we were freeing AMD graphics hardware and were busy fixing bugs in X.org so that it could still ship with new openSUSE/SLED releases.

On the other hand, this very week, it has been 6 years since i got the EPIA-M board that got me started on graphics driver development. This might not seem that important to you, and some people have worked hard to minimalise the importance of this too; but this board has quite significantly changed the world of free graphics drivers.

Anyway, here it is, finally; Coreboot native VGA textmode!

For those who don't know Coreboot; Coreboot provides the basic HW initialisation needed to bring up a motherboard so that an operating system or other payloads can be loaded. It was called LinuxBIOS until 2008, when everyone agreed that LinuxBIOS was too much of a misnomer. Now if you want to rid yourself of proprietary/closed source software properly, then replacing your machines BIOS with coreboot (and a payload) is the way to go.

Until now, if you wanted working graphics with coreboot, you were still tied to the PCI option rom of your graphics card. This code i just pushed out makes even this last vestige of non-free software disappear.

So if you happen to have a VIA motherboard with a K8M890 Northbridge (AMD PCI-Express) with a Chrome 9 IGP, that is supported by coreboot; then you can have native VGA textmode today.

Introducing the Asus M2V-MX SE: a nice little micro-atx motherboard with AM2 support, DDR2, VIA Chrome 9 IGP. It has absolutely stellar coreboot support, and it can be often seen at trade shows, showing off working suspend/resume and even windows 7 booting. Now if you do not want something like windows 7 booting, then you can get rid of the VGA BIOS completely and get a nice working text console with, for instance, linux.

Don't ask me what sort of fancy modes you can set with this. What you get here is just 80x25 VGA textmode. Yeah, that's right; proper old-style VGA textmode, the sort that everything PC out there supports. The sort that, when things go slightly awry, you are always happy to see. The sort that has saved you so often.

It should be clear that my intention with this was not to re-invent some BIOS infrastructure to do modesetting, or to provide an INT10 or VESA implementation. To me, having fought BIOSes for graphics for the best part of this decade, that sounds pretty pointless. And as you might remember, my unichrome driver has been able to bring up un-posted hardware without issues for quite a while. What I wanted here is the basic infrastructure to see what is going wrong with a booting system, before a proper driver has kicked in, and be able to fix it without having to rely on a serial console.

This code achieves just that goal, and it consists of two parts.

First of all, there is the general, standard part, that any IBM PC compatible graphics adapter from the last 20 years should be able to use: the VGA side of things; vga io routines, and an actual VGA 80x25 modeset complete with cursor and font handling. This code was already committed late May in the hope that my EPIA-M would stop fighting back soon, and partly thanks to the font included, it was quite a big blob of code that got pushed into coreboot then.

The second part, is the K8M890/Chrome 9 specific part: initialising the hw in such a way that a full VGA modeset can use the hw happily. This is barely a few hundred lines of code.

Why just a few hundred lines? Well, this is IGP hardware, so the gpu is sitting off the northbridge, and has a (in this case, semi-)direct route to the systems main RAM and uses part of that for its framebuffer. There is also little of this running-things-on-the-absolute-edge nonsense that is so common on discrete cards. Coreboot sets up the ram for us, it sets up the BARs and io/irq routing for us; all we have to do is set up a vga mode, and fill in the bit in between.

On a board as well supported as the Asus M2V-MX SE this bring-up was a walk in the park, it basically took the best part of yesterday morning. And this exercise is very reproducable for the other unichromes as well. But the first one after this should still be my 6y old Epia-m board into shape with coreboot still (ints and VT8235 IDE *rolls eyes*), this board deserves nothing less.

Oh, one more thing; if you have an M2V-MX SE and wish to try this code, then i would like to advice you to hold off a bit. We need to still shore up the cmos settings and make it more foolproof. I seriously doubt that people enjoy having their machines stop during RAM initialisation because they tried to change the default framebuffer size. This is due to other settings in a badly initialized CMOS getting validated when the videoram size setting fixes the checksum. It shouldn't take long to fix this, and then, running coreboot on this board shouldn't be that scary for even the less experienced hacker.

From: louise_hoffman
2009-07-23 03:24 pm (UTC)


Very impressive! =)

So where will you go from here? Support for other boards, or a whole new direction?

(Reply) (Thread)
[User Picture]From: libv
2009-07-23 05:50 pm (UTC)

Re: Impressive!

Support for another board is there already, but the rest of the board support needs more work. Apart from that, i have several things lined up that aren't directly related to coreboot.
(Reply) (Parent) (Thread)
From: ext_201188
2009-07-27 12:31 pm (UTC)


Just bought an ASUS M2V-MX SE for Coreboot support, so your work is very much appreciated.

(Reply) (Thread)
[User Picture]From: libv
2013-08-06 11:14 pm (UTC)
Edited to update email links to the coreboot list (as they seem to have shifted over time).
(Reply) (Thread)